This invention relates generally to integrated circuits, and particularly to the use of non-volatile memory cells as replacements for fuse elements in memory storage devices.
As integrated circuits become more complex and densely populated, the probability of a failure or fault occurring in the integrated device increases, often simply due to the increase in the number of devices on the integrated circuit. This is a particular problem with memory storage devices such as dynamic random access memories (DRAM), static RAM (SRAM), magnetoresistive RAM (MRAM), etc. since memory storage devices tend to be extremely densely packed. A commonly used technique to deal with the increased probability of failures is to include redundant elements on the integrated circuit. For example, memory storage devices may contain additional segments and arrays of storage cells that can be used in place of the faulty segments and arrays.
One way to make use of the redundant memory segments and arrays is to use laser fuses to store the memory addresses of faulty memory storage cells. When the faulty memory storage cell is accessed, circuitry redirects the access to a redundant storage cell that is not faulty. However, the use of laser fuses requires an additional manufacturing step where memory storage cells in the memory storage device is scanned and faulty storage cells are marked and their locations written (blown) into the laser fuses. The additional manufacturing step adds cost, both in terms of time and money, to the storage device.
Additionally, because the laser fuses are written during the manufacturing process and prior to the packaging, the laser fuses cannot be updated after the integrated circuit is packaged. Therefore, should additional memory storage cells become defective during use, their addresses cannot be written (stored in the laser fuses) and redundant storage cells cannot take their place, making the memory storage device unusable.
A need has therefore arisen for a method and apparatus that can be used to store information regarding faulty memory storage cells that also provides for the ability to update the information regarding faulty memory storage cells after the storage device has been under use.
In one aspect, the present invention provides a semiconductor memory device comprising: a first memory for storing logical data values in storage cells, an address decoder coupled to the first memory, the address decoder containing circuitry to decode address bits provided to the memory device and to select a storage cell, a redundant controller coupled to the address decoder, the redundant controller comprising a second memory for storing a list of addresses of faulty memory storage cells and a redundant memory storage cell for each faulty memory storage cell, wherein the second memory comprising non-volatile memory cells, a redundant address decoder coupled to the redundant controller, the redundant address decoder containing circuitry to decode the address bits of the replacement memory storage cells to select a redundant memory storage cell in the redundant memory, and a redundant memory coupled to the redundant address decoder, the redundant memory containing redundant memory storage cells.
In another aspect, the present invention provides a method for providing fault tolerance in a semiconductor memory device comprising: testing memory storage cells for faults, determining faulty memory storage cells, saving faulty memory storage cells to non-volatile memory, and associating redundant memory storage cells to the faulty memory storage cells.
The present invention provides a number of advantages. For example, use of a preferred embodiment of the present invention allows the information stored in the non-volatile memory to be updated after the memory storage device has been packaged and is already in use. This also permits the addition of new faulty memory cell addresses to a list of faulty memory cell addresses and permit the continued use of the memory storage device that would have otherwise resulted in the memory storage device being discarded. This ability to update the list of faulty memory cell addresses allows the periodic check for new faulty memory cells and the addition of any new faulty memory cells to the list of faulty memory cells.
Additionally, use of a preferred embodiment of the present invention allows for greater information density when compared to the use of laser fuses to store information due to the smaller size of the non-volatile memory cells when compared to the laser fuses. The greater information density permits a smaller footprint required to save a same amount of address information.
Also, use of a preferred embodiment of the present invention saves on manufacturing cost because an additional step during the manufacturing process to burn the laser fuses is not required. In fact, the use of a preferred embodiment of the present invention permits the complete manufacture and packaging of the memory storage devices and then allows for the testing of the storage devices at a later time.
Also, use of a preferred embodiment of the present invention permits the choice of either the cross-point array architecture or the MRAM FET architecture, allowing the user to use whichever existing device architecture they are currently using and not requiring the change to any one particular device architecture.